Field of the Disclosure
The present disclosure relates generally to processing systems and, more particularly, to the reversal of speculative state changes and resource recovery in processing systems.
Description of the Related Art
Processing devices, such as central processing units (CPUs), graphical processing units (GPUs), and accelerated processing units (APUs), implement instruction pipelines to increase executed instruction throughput. A typical instruction pipeline includes several pipeline stages, such as an instruction fetch stage, a decode stage, an execution stage, a memory access stage, and a write-back stage. Instruction schedulers can be used to improve the overall pipeline throughput by optimizing the order or schedule of execution of instructions. For example, out-of-order instruction scheduling can be used to schedule instructions for execution in the pipeline in an order that is different than the program order of the instructions.
Processing devices may also be able to execute instructions speculatively. For example, the processing device typically includes branch prediction logic that can predict a path following a conditional instruction such as a branch instruction. The processing device can speculatively execute instructions on the path before results of the branch instruction are known. Branch prediction logic can predict the instruction path with reasonable accuracy and consequently speculative instruction execution can improve the performance of the processing device. However, branch prediction logic is not perfect and the processing device should be able to recover when the branch prediction logic picks the wrong path and instructions that were executed speculatively along incorrectly predicted paths are flushed from the pipeline. Recovery typically includes waiting for any speculative instructions along correctly predicted paths to retire. Once the correct speculative instructions have retired, state changes caused by the incorrect speculative instructions can be reversed. Resources such as register file entries that were allocated to instructions along the incorrectly predicted path may then be recovered.